硬件工具工程师
Hardware Tools Engineer
关于团队
OpenAI 的硬件团队开发针对先进 AI 工作负载独特需求的原生 AI 芯片和系统级解决方案。在 Jalapeño 等工作的基础上，该团队正在开发下一代原生 AI 芯片和高度集成的系统，以支持前沿模型的下一次迭代。通过芯片、系统、工具和方法的协同设计，该团队帮助为 OpenAI 的超算平台交付更快、更高效且可投入生产的硬件。
关于职位
你将开发和演进硬件工程师日常依赖的工具生态系统——从硬件编译器和 IR 转换到仿真、调试和自动化基础设施。这项工作涵盖软件工程、编译器概念和实际的硬件工作流程，并直接影响我们设计下一代 AI 系统的速度和效率。
你将与架构师、RTL 设计师和验证工程师紧密合作，将真实的工程痛点转化为持久、可扩展的工具解决方案。
在此职位中，你将：
- 构建并改进使硬件团队更高效的软件工具：编译、IR 转换、RTL 生成、仿真、调试和自动化。
- 扩展和集成硬件编译器栈（前端、IR 传递、降低、调度、代码生成到 Verilog/SystemVerilog），并将其连接到实际的设计工作流程。
- 提升开发者体验和可靠性：可复现的构建、更好的错误信息、更快的迭代循环以及可靠的 CI 和回归基础设施。
- 与设计师和验证工程师紧密合作，将真实痛点转化为持久的工具。
- 在需要时深入 RTL：阅读和分析 Verilog/SystemVerilog 以调试问题、验证工具输出并提升可调试性。
- 在必要时愿意深入堆栈底层，包括门级视图、综合结果和实现产物。
- 通过围绕面积、时序和功耗权衡的分析和自动化，帮助实现 PPA 优化循环，并通过改进影响这些结果的工具来提升性能。
如果你具备以下条件，可能会在这个职位上表现出色：
- 有构建和维护软件的经验（项目、实习、研究、开源或其他同等经验）。
- 扎实的计算机科学基础：数据结构、算法、调试和软件设计。
- 熟练掌握 Rust、C++ 或 Python 中至少一种（并愿意学习其余语言）。
- 熟悉
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About the Team
OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform.
About the Role
You will develop and evolve the tooling ecosystem that hardware engineers rely on every day — from hardware compilers and IR transformations to simulation, debugging, and automation infrastructure. The work spans software engineering, compiler concepts, and practical hardware workflows, with direct impact on how quickly and effectively we design next-generation AI systems.
You’ll collaborate closely with architects, RTL designers, and verification engineers to translate real engineering friction into durable, scalable tooling solutions.
In this role you will:
- Build and improve the software tooling that makes hardware teams faster: compilation, IR transforms, RTL generation, simulation, debug, and automation.
- Extend and integrate hardware compiler stacks (frontends, IR passes, lowering, scheduling, codegen to Verilog/SystemVerilog) and connect them to real design workflows.
- Improve developer experience and reliability: reproducible builds, better error messages, faster iteration loops, and dependable CI and regression infrastructure.
- Work closely with designers and verification engineers to turn real pain points into durable tools.
- Dive into RTL when needed: read and reason about Verilog/SystemVerilog to debug issues, validate tool output, and improve debuggability.
- Be willing to go all the way down the stack when necessary, including gate-level views, synthesis results, and implementation artifacts.
- Help enable PPA optimization loops by building analysis and automation around area, timing, and power tradeoffs, and by improving tooling that impacts those outcomes.
You might thrive in this role if:
- Demonstrated ability to build and maintain software (projects, internships, research, open source, or equivalent experience).
- Strong CS fundamentals: data structures, algorithms, debugging, and software design.
- Proficiency in at least one of Rust, C++, or Python (and willingness to learn the rest).
- Familiarity with digital design concepts and the ability to read RTL (Verilog/SystemVerilog) or equivalent hardware descriptions.
- Familiarity with compiler or IR-based ideas (representations, passes, transformations, lowering), through coursework or projects.
- Comfort operating in ambiguity and iterating quickly with users of your tools.
Nice to have skills:
- Exposure to compiler and hardware toolchains such as XLS/DSLX, LLVM, Chisel/FIRRTL, CIRCT/MLIR, other novel hardware languages (e.g. HardCaml, SpinalHDL, Spade, PyMTL, Clash, BlueSpec, PyRope)
- Experience with Verilog tooling ecosystems (Yosys/RTLIL, Verilator, Slang) or writing tooling around them.
- Experience with build and test infrastructure (Bazel, CI systems, fuzzing, performance testing).
- Prior work touching synthesis, place and route, static timing analysis, or other PPA-related workflows.
To comply with U.S. export control laws and regulations, candidates for this role may need to meet certain legal status requirements as provided in those laws and regulations.
About OpenAI
OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity.
We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic.
For additional information, please see OpenAI’s Affirmative Action and Equal Employment Opportunity Policy Statement https://cdn.openai.com/policies/eeo-policy-statement.pdf.
Background checks for applicants will be administered in accordance with applicable law, and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws, including the San Francisco Fair Chance Ordinance, the Los Angeles County Fair Chance Ordinance for Employers, and the California Fair Chance Act, for US-based candidates. For unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: protect computer hardware entrusted to you from theft, loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non-public information. In addition, job duties require access to secure and protected information technology systems and related data security obligations.
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At OpenAI, we believe artificial intelligence has the potential to help people solve immense global challenges, and we want the upside of AI to be widely shared. Join us in shaping the future of technology.