设计验证工程师
Design Verification Engineer
职位详情：
职位描述：
我们正在寻找一位有才华、自我驱动的工程师加入我们的设计验证团队。我们致力于行业中最具有技术挑战性的硅芯片，涵盖数字和模拟设计、DSP流水线以及固件-硬件协同验证。
这个职位适合早期职业工程师，希望在高速硅验证领域建立深厚的技术专长。你将与经验丰富的工程师一起工作，参与实际硅芯片的生产，随着能力提升，将有大量学习、成长和承担责任的机会。
我们开发什么
我们的团队开发并验证高速SerDes IP——这是在PCIe、以太网和其他行业标准接口上移动数据的物理层技术。做好这一点至关重要：世界的数据通过我们构建的产品传输。
你将做什么
- 为SerDes和PHY模块开发和维护SystemVerilog/UVM验证环境
- 编写测试平台、功能覆盖率模型和断言
- 运行仿真，分析故障，并调试RTL和测试平台问题
- 与设计、架构和模拟团队合作进行模块级和顶层验证
关于Altera
Altera是全球最大的独立纯FPGA公司。我们的可编程逻辑设备为数据中心、电信基础设施、AI加速器和工业系统提供支持。最近从Intel分拆为一家独立公司，我们结合了几十年的FPGA传统与全新起点的专注和敏捷性。
资格要求：
- 电子工程、计算机工程或同等专业的学士学位
- 0–5年数字设计或验证经验（实习、学术项目或行业经验）
- 熟悉SystemVerilog，基本了解UVM概念
- 扎实的数字设计基础：同步逻辑、状态机、流水线、时钟域交叉
- 强大的分析和调试思维——你喜欢深入解决问题
- 良好的英语沟通能力（口语和书面）
- 候选人应能居住在Iași。
职位类型：
常规班次：
班次1（罗马尼亚）主要地点：
Iași，罗马尼亚（远程）其他地点：
招聘声明：
所有合格申请人将获得就业考虑，不因种族、肤色、宗教、宗教信仰、性别、国籍、祖先、年龄、身体或精神残疾、健康状况、基因信息、军事和退伍军人身份、婚姻状况而受到歧视。
查看英文原文
Job Details:
Job Description:
We're looking for a talented, self-motivated engineer to join our Design Verification team. We work on some of the most technically challenging silicon in the industry, spanning digital and analog design, DSP pipelines, and firmware-hardware co-verification.
This role is ideal for an early-career engineer who wants to build deep technical expertise in high-speed silicon verification. You'll work alongside experienced engineers on real silicon shipping to production, with plenty of opportunity to learn, grow, and take ownership as you ramp up.
What We Build
Our team develops and verifies high-speed SerDes IP — the physical layer technology that moves data across PCIe, Ethernet, and other industry-standard interfaces. Getting this right matters: the world's data moves through what we build.
What You'll Do
- Develop and maintain SystemVerilog/UVM verification environments for SerDes and PHY blocks
- Write testbenches, functional coverage models, and assertions
- Run simulations, analyze failures, and debug both RTL and testbench issues
- Collaborate with design, architecture, and analog teams on block-level and top-level verification
About Altera
Altera is the world's largest independent, pure-play FPGA company. Our programmable logic devices power data centers, telecommunications infrastructure, AI accelerators, and industrial systems. Recently spun out from Intel as an independent company, we combine decades of FPGA heritage with the focus and agility of a fresh start.
Qualifications:
- BSc in Electrical Engineering, Computer Engineering, or equivalent
- 0–5 years of experience in digital design or verification (internships, academic projects, or industry)
- Working knowledge of SystemVerilog and basic familiarity with UVM concepts
- Solid digital design fundamentals: synchronous logic, FSMs, pipelining, clock domain crossing
- Strong analytical and debug mindset — you enjoy getting to the bottom of a problem
- Good communication skills in English (spoken and written)
- Candidates should preferably be able to reside in Iași.
Job Type:
RegularShift:
Shift 1 (Romania)Primary Location:
Iași, Romania (Remote)Additional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Originally posted on Himalayas