设计验证与后硅验证
DFT & Post-Silicon Validation
在TechBiz Global，我们为我们的顶级客户提供建筑服务。我们正在寻找一位DFT及后硅验证工程师加入其中一家客户的团队
您是否热衷于复杂SoC和封装芯片的可测试性设计（DFT）？我们需要您！作为高级DFT及后硅验证负责人，您将负责DFT实施流程，确保与测试和后硅验证团队的无缝集成。您将使用前沿技术，与外部IP供应商、EDA厂商及内部团队紧密合作，为量产交付高质量、高性能的SoC或SiP。
主要职责
- 领导与团队管理
- 带领并指导DFT及后硅工程团队，推动创新和效率提升。
- 提供技术方向，确保与组织目标一致。
- 营造持续改进和协作的文化。
- DFT策略与执行
- 定义并实施DFT架构，以提高可测试性、调试能力和可制造性。
- 确保正确插入DFT功能，如扫描链、BIST（内置自检）和JTAG接口。
- 优化DFT方法，以减少测试时间、降低成本并提高质量和良率。
- 测试开发与实施
- 在硅片、封装和系统层面开发和实施测试计划和测试策略。
- 定义并开发用于生产和特性分析的自动化测试解决方案。
- 确保所有产品开发阶段的测试覆盖率，从预硅片到量产。
- 在考虑芯片模块复杂性的前提下，保证最终解决方案的高良率。
- 跨职能协作
- 与设计、验证、封装和运营团队紧密合作，确保测试和可制造性的无缝集成。
- 与产品管理团队协作，确保与客户需求和时间表一致。
- 流程改进与创新
- 持续探索并实施新的DFT方法和制造流程。
- 领导降低成本、提高效率和提升测试与生产质量的项目。
- 汇报结构
- 汇报对象：物理实现团队经理
- 下属人员：DFT及后硅团队成员
- 要求
- 计算机科学、电子工程或相关领域的学士、硕士或博士学位。
- 具有多个高密度芯片流片的丰富经验。
查看英文原文
At TechBiz Global, we are providing recruitment service to our TOP clients from our portfolio. We are currently looking for a
DFT & Post-Silicon Validation to join one of our clients' team
Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in package? We need you! As a Senior DFT and Post-Silicon Lead, you will own the DFT implementation process, ensuring seamless integration with test and post-silicon validation teams. You will work with cutting-edge technology, collaborating closely with external IP providers, EDA vendors, and internal teams to deliver high-quality, high-performance SoCs or SiPs for mass production.
Key Responsibilities
- Leadership & Team Management
- Lead and mentor the DFT and Post-Silicon engineering teams to drive innovation and efficiency.
- Provide technical direction, ensuring alignment with organizational goals.
- Foster a culture of continuous improvement and collaboration.
- DFT Strategy & Execution
- Define and implement DFT architectures to improve testability, debug capabilities, and manufacturability.
- Ensure proper insertion of DFT features such as scan chains, BIST (Built-In Self-Test), and JTAG interfaces.
- Optimize DFT methodologies to minimize test time, reduce cost, and improve quality/yield.
- Test Development & Implementation
- Develop and implement test plans and test strategies at silicon, package, and system levels.
- Define and develop automated test solutions for production and characterization.
- Ensure test coverage for all product development stages, from pre-silicon to mass production.
- Guarantee high yield on the final solution while considering chiplet complexities.
- Cross-Functional Collaboration
- Work closely with design, validation, packaging, and operations teams to ensure seamless integration of testing and manufacturability.
- Collaborate with product management to ensure alignment with customer requirements and timelines.
- Process Improvement & Innovation
- Continuously explore and implement new DFT methodologies and manufacturing processes.
- Lead initiatives for cost reduction, efficiency improvements, and quality enhancements in test and production.
Reporting Structure
Reports to: Physical Implementation Team Manager
Receives reports from: DFT and Post-Silicon team members
Requirements
- Bachelor’s, Master’s, or PhD in Computer Science, Electrical Engineering, or a related field.
- Proven experience with multiple tape-outs of high-performance SoCs or SiPs for mass production.
- Strong background in post-silicon test optimization and yield analysis.
- Experience in defining and implementing test strategies for high-volume production.
- Proficiency in RTL and testbench development using SystemVerilog and Verilog.
- Strong scripting skills (Shell, Tcl, Python3).
- Hands-on experience with Tessent and SSN methods integrated with leading EDA design flows for advanced technology nodes is a plus.
Originally posted on Himalayas