出海雷达

ASIC & FPGA Design Engineer Sr - E3

开发工程限定地区(需当地身份)
公司Lockheed Martin Corporation
薪资$98,100 - $182,100/年
工作地点United States
地域资格限定地区(需当地身份)
时区要求日间重叠约 9 小时,基本正常作息
用工类型Full Time
发布时间今天
数据来源Himalayas
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注意地域限制:该职位明确限定在 United States 招聘。如果你是位于中国大陆的求职者,通常需要当地工作身份才能投递,或需与雇主确认是否接受独立合同(Contractor)形式合作。
关于本页中文:职位描述由本机离线模型翻译,属机器翻译,供快速判断用;正式沟通与投递请以英文原文为准。官方翻译通道恢复后会自动重译升级。

标准职位描述你将担任洛克希德马丁导弹和消防控制部门的 ASIC/FPGA 设计工程师。我们的团队提供完整的定制模拟和混合信号 IC,以支持先进的防御系统,从130nm 到12 nm 范围内的高电压 BCD 过程。作为 ASIC&FPGA 设计工程師,你将拥有整个布局流程从地板通过磁带出工作手头与电路设计人员一起转换方案意图成高性能,寄生虫意识到物理设计。你将在双工具环境中运作 (Synopsys Custom Compiler 和 Cadence Virtuoso)并通过多个造厂进行物理验证关闭,直接支持任务关键的程序。你的责任包括:• 创建地图,位置和路线模拟块,优化区域,匹配,信号完整性和电源交付。• 为每个目标过程实现全面关闭驱动 DRC,LVS 和 ERC 验证。•执行或支持 EMIR 分析来检测和修复 IR 和电子迁移问题。• 为部门制定和维护布局方法,自动化脚本和最佳实践指南。• 与电路设计师,验证工程师和系统架构师合作以确保布局反映了功能意图和性能目标。• 管理带外签署包裹,包括文档,设计规则板和发布说明。• 导师年轻布局工程师并促进知识分享文化。为什么加入我们?你想成为一个让员工有能力思考大,领导与增长思维方式,使不可能的现实的一部分公司文化的一部分吗?我们提供资源和灵活性来启发灵感和关注。如果你有梦想大,努力工作和享受自己喜欢的事情,那么我们希望与你一起建立更好的明天。我们提供灵活的工作日程,为你投资未来和安全带来全面的福利,在这里了解更多关于洛克希德马丁的综合福利计划。更多有关此机会的信息:这个职位是远程的。必须成为美国公民 - 这一职位位于需要特殊访问的设施中。所选的候选人必须能够获得秘密许可证。基本资格 • 在电气工程,电子技术,微电子或相关技术学科上取得副本学位或以上

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Standard Job Description

You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed  Martin  Missiles  and  Fire  Control. Our team delivers full custom analog and mixed signal ICs that power advanced defense systems, ranging from 130 nm down to 12 nm and including high voltage BCD processes.

What You Will Be Doing
As the ASIC & FPGA Design Engineer you will own the entire layout flow—from floorplan through tape out—working hand in hand with circuit designers to turn schematic intent into high performance, parasitic aware physical designs. You will operate in a dual tool environment (Synopsys Custom Compiler and Cadence Virtuoso) and drive physical verification closure across multiple foundries, directly supporting mission critical programs. Your responsibilities will include:

• Create floorplans, place and route analog blocks, optimizing area, matching, signal integrity and power delivery.
• Drive DRC, LVS and ERC verification to achieve full closure for each target process.
• Perform or support EMIR analysis to detect and remediate IR drop and electromigration concerns.
• Develop and maintain layout methodology, automation scripts and best practice guidelines for the department.
• Collaborate with circuit designers, verification engineers and system architects to ensure the layout reflects functional intent and performance targets.
• Manage tape out sign off packages, including documentation, design rule decks and release notes.
• Mentor junior layout engineers and promote a knowledge sharing culture.

Why Join Us
Do you want to be part of a company culture that empowers employees to think big, lead with a growth mindset, and make the impossible a reality? We provide the resources and give you the flexibility to enable inspiration and focus. If you have the passion and courage to dream big, work hard, and have fun doing what you love then we want to build a better tomorrow with you.

We offer flexible work schedules to comprehensive benefits investing in your future and security, Learn more about Lockheed Martin’s comprehensive benefits package here.

Further Information About This Opportunity:

This position is remote.

MUST BE A U.S. CITIZEN - This position is located at a facility that requires special access. The selected candidate must be able to obtain a secret clearance.

Basic Qualifications

• Associate degree or higher in Electrical Engineering, Electronics Technology, Microelectronics, or a related technical discipline
• 8 or more years of experience in full-custom analog or mixed-signal IC layout design
• Layout experience across process nodes ranging from 130nm to 12nm, including BCD technologies
• Proficiency with Synopsys Custom Compiler (or Custom Designer)
• Proficiency with Cadence Virtuoso layout environment
• Experience with physical verification closure (DRC, LVS, ERC, ANT) across multiple foundry processes
• Ability to obtain a U.S. security clearance

Desired Skills

• Bachelor degree or higher in Electrical Engineering, Microelectronics, or a related field
• EMIR analysis experience, including IR drop and electromigration mitigation
• Scripting or layout automation skills (SKILL, Tcl, Python, or Perl)
• Layout experience with precision analog blocks such as PLLs, ADC/DACs, LDOs, bandgap references, or amplifiers

Pay Information
GeoZone Definition: GeoZones are geographic groupings created by Lockheed Martin to align compensation ranges with regional labor markets and cost-of-labor differences across the United States. Locations are assigned a Geo Zone based on the primary work location of the role.

  • Full-time salary range (GEOZONE 1): $122600.00 - $227600.00 · Includes metropolitan areas such as Sunnyvale CA; Pal Alto, CA; New York City metropolitan area; Newark, New Jersey; etc.
  • Full-time salary range (GEOZONE 2): :$110300.00 - $204900.00 · Includes metropolitan areas such as Denver, CO; King of Prussia, PA; Stratford, CT; Moorestown, NJ; etc.
  • Full-time salary range (GEOZONE 3): :$98100.00 - $182100.00· Includes metropolitan areas such as Dallas–Fort Worth, TX; Orlando, FL; Grand Prairie, TX; Marietta, GA; etc.
  • Full-time salary range (GEOZONE 4): :$88300.00 - $163900.00· Includes metropolitan areas such as Camden, AR; Lexington, KY; Ocala, FL; Lufkin, TX; etc.

At Lockheed Martin, we know mission success starts with taking care of our people. Our Total Rewards program is designed to attract top talent, support your well-being, and help you grow—both professionally and personally.
The salary range for this position is as listed on the requisition. Please note that the salary information listed is a general guideline only.
Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market(work location) and business considerations when extending an offer.
Benefits offered: Medical, Dental, Vision, Flexible work arrangements and schedules (e.g., 4x10), 401(k) match, Paid time off, Holidays, Parental Leave, EAP, Flexible Spending Accounts, Education Assistance, Life Insurance, Short-Term Disability, and Long-Term Disability.

  • Annual short-term and/or long-term incentive compensation programs may be offered depending on the position. Payments under these annual programs are not guaranteed and can vary from year to year and are tied to a range of performance metrics.
  • For (Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.

Originally posted on Himalayas

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